Intel Embedded Intel486 User Manual

4-71
BUS OPERATION
Figure 4-49. Snoop under AHOLD Overlaying Pseudo-Locked Cycle
4.4.6.2 Snoop under Hold during Pseudo-Locked Cycles
As shown in Figure 4-50, HOLD does not fracture the 64-bit burst transfer. The Write-Back En-
hanced IntelDX4 processor does not issue HLDA until clock four. After the 64-bit transfer is
completed, the Write-Back Enhanced IntelDX4 processor writes back the modified line to mem-
ory (if snoop hits a modified line). If the 64-bit transfer is non-burst, the Write-Back Enhanced
IntelDX4 processor can issue HLDA in between bus cycles for a 64-bit transfer.
242202-161
CLK
AHOLD
EADS#
HITM#
A31–A4
A3–A2
ADS#
12345678910111213141516171819
BLAST#
CACHE#
To Processor
†
W/R#
0 4 8 C
INV
PLOCK#
BRDY#
Write Back Cycle
†

Intel Embedded Intel486 Specifications

General

Brand	Intel
Model	Embedded Intel486
Category	Computer Hardware
Language	English