7-17
PERIPHERAL SUBSYSTEM
7.2 BASIC PERIPHERAL SUBSYSTEM
All microprocessor systems include a CPU, memory and I/O devices which are linked by the ad-
dress, data and control buses. Figure 7-8 illustrates the system block diagram of a typical Intel486
processor-based system.
Figure 7-8. System Block Diagram
An embedded Intel486 processor system may consist of several subsystems. The heart of the sys-
tem is the processor. The memory subsystem is also important and must be efficient and opti-
mized to provide peak system level performance. As described in Chapter 5, “Memory
Intel486™
Processor
LAN
Controller
Cache
Subsystem
Memory
Subsystems
DMAC
Memory Bus
Bus
Translator
I/O Bus
Bus
Interface
SCSI/IPI
Interface
ESDI
(EISA, MCA,
Proprietary)
PCI, ISA, or
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