EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
7-16
Table 7-10. 32-Bit to 32-Bit Bus Swapping Logic Truth Table
Intel486™ Processor
(3)
8-Bit Interface
(1)
BE3# BE2# BE1# BE0# BEN16# BEN8UH# BEN8UL# BEN8H# BHE#
(2)
A1 A0
0000 1 1 1 1 X X X
1000 1 1 1 1 X X X
0100
†
1111XXX
1100 1 1 1 1 X X X
0010
†
1111XXX
1010
†
1111XXX
0110
†
1111XXX
1110 1 1 1 1 X X X
0001 1 1 1 1 X X X
1001 1 1 1 1 X X X
0101
†
1111XXX
1101 1 1 1 1 X X X
0011 1 1 1 1 X X X
1011 1 1 1 1 X X X
0111 1 1 1 1 X X X
1111
†
1111XXX
Inputs Outputs
NOTES:
1. X implies “do not care” (either 0 or 1).
2. BHE# (byte high enable) is not needed in 8-bit interface.
3.
†
indicates a non-occurring pattern of byte enables; either none are asserted or the pattern has byte
enables asserted for non-contiguous bytes.
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