Lenze EVS 9300 series - Page 175

Function library
Function blocks
9.2.1 Table of the function blocks
9-49
L
EDSVS9332S-D11 EN 3.0
Function block used in basic configuration C0005CPU time
[μs]
DescriptionFunction block
212070006000500040001000
CPU time
[μs]
Description
DIGIN Input terminals X5/E1...X5/E5 – • • • • • • •
DIGOUT Output terminals X5/A1...X5/A4 – • • • • • • •
DT1-1 Differential element 12
FCNT1 Piece counter 11
FEVAN1 Free analog input variable
4
FEVAN2 Free analog input variable
4
FDO Free digital outputs –
FIXED Constant signals – • • • • • • •
FIXSET1 Fixed setpoints 9
FLIP1 D-flipflop 1
6
• •
FLIP2 D-flipflop 2
6
GEARCOMP Gearbox torsion 1
LIM1 Limiter 5 • •
MCTRL Motor control – • • • • • • •
MFAIL Mains failure detection 40 • •
MLP1 Motor phase failure detection 30
MONIT Monitoring – • • • • • • •
MPOT1 Motor potentiometer 20
NOT1 Logic NOT, block1
4
• • • •
NOT2 Logic NOT, block2
4
• •
NOT3 Logic NOT, block3 • •
NOT4 Logic NOT, block4 •
NOT5 Logic NOT, block5 •
NSET Speed setpoint conditioning 70 • • • • •
OR1 Logic OR, block1
6
• • • • •
OR2 Logic OR, block2
6
• •
OR3 Logic OR, block3 •
OR4 Logic OR, block4 •
OR5 Logic OR, block5 •
OSZ Oscilloscope function 70
PCTRL1 Process controller 58
PHADD1 32 bit addition block 10
PHCMP1 Comparator
8
•
PHCMP2 Comparator
8
PHCMP3 Comparator
PHDIFF 32 bit setpoint/act. value comparison 10
PHDIV1 Conversion 8
PHINT1 Phase integrator
7
PHINT2 Phase integrator
7
PHINT3 Phase integrator 10
PT1-1 1st order delay element 8
CW/CCW/Q QSP / setpoint inversion 8 • • • •
REF Homing function 100 • • • • •
RFG1 Ramp function generator 16 •
S&H Sample and Hold 4
SRFG1 S-shape ramp function generator 15
STAT Digital status signals – • • • • • • •
STATE-BUS State bus –
STORE1 Memory 1 35
STORE2 Memory 2 20
SYNC1 Multi-axis positioning 55
TRANS1 Binary edge evaluation
7
TRANS2 Binary edge evaluation
7
TRANS3 Binary edge evaluation
TRANS4 Binary edge evaluation