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Lenze EVS 9300 series - Page 31

Lenze EVS 9300 series
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Technical data
3.2 General data/operating conditions
3-3
L
EDSVS9332S-B EN 3.0
Open loop and closed loop control
Switching frequency 8 ... 16 Nm
Digital setpoint selection Accuracy ±0.005 Hz (= ±100 ppm)
Analog setpoint selection
Linearity ±0.15 % Signal level: 5 V or 10 V
A
n
a
l
o
g
s
e
t
p
o
i
n
t
s
e
l
e
c
t
i
o
n
Temperature
sensitivity
±0.1 % 0 ... 50 Nm
Offset ±0 %
Analog inputs/analog outputs 2 inputs (bipolar)
2 outputs (bipolar)
Digital inputs/digital outputs 5 inputs (freely assignable)
1 input for c ontroller inhibit
4 outputs (freely assignable)
1 incremental encoder input (500 kHz, TTL level); Design: 9-pole Sub-D socket
1 resolver input; Design: 9-pole Sub-D socket
1 master frequency input (500 kHz, TTL level); Design: 9-pole Sub-D socket; Can be optionally used as
incremental encoder input (500 kHz, TTL level)
1 master frequency output (500 kHz, TTL level); Design: 9-pole Sub-D socket
Cycle times
Digital inputs 1ms
C
y
c
l
e
t
i
m
e
s
Digital outputs 1ms
Analog inputs 1ms
Analog outputs 1 ms (smoothing time: τ =10ms)

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