Issue 3 June 2001 7-1
7
Circuit Pack Descriptions 7
Overview 7
This section provides a detailed functional description of the DDM-2000 OC-3
Multiplexer circuit packs.
Introduction 7
The circuit packs in the DDM-2000 OC-3 Multiplexer are divided into three main
categories:
■ Control circuit packs
— BBG8/BBG8B system controller (SYSCTL)
— BBG9 overhead controller (OHCTL)
■ Synchronization circuit pack
— BBF2B timing generator (TGS)
— BBF4 timing generator 3 (TG3)
■ Transmission circuit packs
— BBF1/BBF1B DS1 low-speed interface (DS1)
— BBF3/BBF3B DS1 performance monitoring (DS1PM)
— BBF8 high bit rate digital subscriber line (HDSL)
— BBG2/BBG2B VT to STS-1 multiplexer (MXRVO)
— BBG4/BBG4B DS3 low-speed interface (DS3)
— BBG6 EC-1 high-speed and low-speed interface (STS1E)
— BBG19 DS3 data services interface
— BBG20 Transmultiplexer
— 22F/22F-U/22F2-U OC-3 (Intermediate Reach) OLIU
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