15-4. Error condition / Reset requesting flag
The condition sequence and the reset sequence when CSD-892-73 detects the error are
displayed.
When an error is detected, [Error condition flag (RX(n+7)A] is turned on after [Remote
READY (RX(n+7)B)] is turned off.
When the master station transmits the ON of [Error reset requesting flag (RY(n+7)A], [Error
condition flag [RX(n+7)A] is turned OFF. Afterwards, [
Remote READY (RX(n+7)B)] is turned
on when [Error reset flag (RY(n+7)A] transmitted by the master station is turned on.
When CSD-892-73 detects the error, please reset the error by the following sequence.
15-5. CPU normal operation signal
This signal informs that CSD-892-73 executes the normal operation.
When CSD-892-73 operates normally, the condition of [CPU normal operation signal (RXn6)]
is reverse
d at 500 ms. intervals.
Error condition flag
(RX(n+7)A)
Error reset requesting flag
(RY(n+7)A)
Remote READY
(RX(n+7)B)
500 ms.
CPU normal operation
(RXn6)
• A temporary delay occurs in CPU normal operation signal while memorizing various
set values and while executing memory clearness.
110
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