Function
The DUTCFG11 register is used to control the CFG_ENG_USE signals. The function of these bits are defined by silicon engineers
for special use.
Diagram
Bits
7 6 5 4 3 2 1 0
R
DRSTDLY ENGUSE1 DDRSRC
W
RRST
SW2[6] SW2[7] SW2[8] 11111
Fields
Field Function
7
DRSTDLY
ENG_USE0: Extended DDR PHY Reset Timing Mode (cfg_enguse0):
0= Extended (delayed) reset timing for DDR PHY.
1= Standard timing.
Valid only on LX2160 Rev. 2 silicon.
6
ENGUSE1
ENG_USE1: Reserved (cfg_enguse1):
1= Default value for reserved pins.
5
DDRSRC
ENG_USE2: DDR Clock Source Select (cfg_enguse2):
0= DDR clocked from DDRCLK pin (default).
1= DDR clocked from differential SYSCLK.
4-0
-
Reserved.
3.55 DUT Configuration 12 (DUTCFG12)
Address
Register Offset
DUTCFG12 06Ch
Function
The DUTCFG12 register is used to provide the general-purpose GPCFG signals.
These settings are sampled by the processor for customers to use as desired, but have no hardware effects.
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 101 / 116
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