NXP Semiconductors QorIQ LX2160A - 3.40 Reset Mask 1 (RST_MASK1)

Diagram
Bits
7 6 5 4 3 2 1 0
R
IRQ1
W
CRST
00 00 00 00
Fields
Field Function
7-6
-
Reserved.
5-4
IRQ1
Sets mode of IRQ1 output:
00= Level-sensitive: drive IRQ1 low on interrupt input == 1.
01= Level-sensitive: drive IRQ1 high on interrupt input == 1.
10= Edge-triggered: drive IRQ1 low on a 0-to-1 edge.
11= Edge-triggered: drive IRQ1 high on a 0-to-1 edge.
Edge-triggered interrupts are cleared by reading the IRQCTL0 register.
3-2
-
Reserved.
1-0
-
Reserved.
3.60 Interrupt Control 2 (IRQCTL2)
Address
Register Offset
IRQCTL2 096h
Function
The IRQCTL2 register allows defining interrupt output modes for IRQ[8:11], where relevant to the target system.
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 105 / 116