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Field Function
0
IEEE
1= Mask RST_IEEESLT_B.
3.43 Board Configuration Registers
This block of registers control the configuration of the board. BRDCFG registers are always static, driven at all times power is
available. There are up to 16 registers providing up to 128 control options; however, not every platform implements all the
registers.
3.44 Board Configuration 0 (BRDCFG0)
Address
Register Offset
BRDCFG0 050h
Function
The BRDCFG0 register is used to connect one of several devices to the XSPI_A interface, which is often used to boot the system.
SW1[6:8] is used to preset the register, which in turn selects the attached device as shown in the following table.
XSPI Mapping
SW1[6:8] CFG_XSPI_MAP CS0 CS1
000 1100 MT35XU512 (U112) MT35XU512 (U115)
001 0011 MT35XU512 (U115) MT35XU512 (U112)
010 0010 Dediprog EM100 (J53) MT35XU512 (U115)
011 1101 Dediprog EM100 (J53) MT35XU512 (U112)
100 0100 MT35XU512 (U112) Dediprog EM100 (J53)
By changing the switch or the register, the following features are possible:
• Boot from a known-good image.
• Boot from an alternate (test) image before committing as a known-good image.
• Boot from an emulator to program blank flash.
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 92 / 116
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