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Field Function
-
3-0
ID
System Clock ID = 0000 (NONE)
CLK0= SYSCLK is fixed on this system.
3.33 Reset Control Registers
The reset control register group handles reset behavior configuration and general monitoring of resets.
3.34 Reset Control (RST_CTL)
Address
Register Offset
RST_CTL 040h
Function
The RST_CTL register is used configure or trigger reset actions.
Diagram
Bits
7 6 5 4 3 2 1 0
R
REQMD RST
W
CRST
00 SW1[5] 000 0
Fields
Field Function
7-6
-
Reserved.
5-4
REQMD
00= Disabled - do nothing.
01= Loopback - assert HRESET_B to DUT, but do not run internal reset sequencer.
10= reserved
11= Normal - assert PORESET_B to DUT and run internal reset sequencer.
SW1[5] selects between disabled mode (00) and normal mode (11), other modes can only be set via
software.
Note: Software cannot change this field if SW1[5] is 0.
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NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 83 / 116