Table 8. LX2160ARDB clocks (continued)
Part identifier Clock generator Clock Specifications Destination
• Operating voltage:
1.8 V
OUT8: CLK_SD1_F_[P, N]
• Frequency:
161.1328125 MHz
• Output type: HCSL
• Operating voltage:
1.8 V
SerDes1 controller
PLL 1
OUT9:
CLK_PHY_40GE_[P, N]
• Frequency: 156.25
MHz
• Output type: HCSL
• Operating voltage:
1.8 V
40 GbE PHY
(CS4223)
U117 Si52208-A01AGM DIFF0_[P, N]:
CLK_SD2_F_[P, N]
• Frequency: 100
MHz (spread-
spectrum capable)
• Output type: HCSL
SerDes2 controller
PLL 1
DIFF1_[P, N]:
CLK_SD2_S_[P, N]
SerDes2 controller
PLL 2
DIFF2_[P, N]:
CLK_SLOT1_[P, N]
PCIe x4 slot
DIFF3_[P, N]:
CLK_SLOT2_[P, N]
PCIe x8 slot
DIFF4_[P, N]:
CLK_SD3_F_[P, N]
SerDes3 controller
PLL 1
DIFF5_[P, N]:
CLK_SD3_S_[P, N]
SerDes3 controller
PLL 2
2.3 DDR interface
The LX2160ARDB supports two high-speed DDR4 memory ports: DDR#1 and DDR#2.
The figure below shows the architecture of the DDR#1 memory port.
NXP Semiconductors
LX2160ARDB Functional Description
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 20 / 116
To Next Page
Loading...
