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Field Function
6-5
-
Reserved.
4
OVDD
OVDD (1.8V) Power Supply Status:
0= Power supply is disabled or faulted.
1= Power supply is operating.
3
-
Reserved.
2
VTT2
VTT2 (DDR block #2) Power Supply Status:
0= Power supply is disabled or faulted.
1= Power supply is operating.
1
VTT1
VTT1 (DDR block #1) Power Supply Status:
0= Power supply is disabled or faulted.
1= Power supply is operating.
0
GVDD
GVDD (1.2V) Power Supply Status:
0= Power supply is disabled or faulted.
1= Power supply is operating.
3.30 Clock Control Registers
The clock control registers control programmable clock synthesizers used to supply clocks to the processor and associated
peripherals.
3.31 Clock Speed 1 (CLK_SPD1)
Address
Register Offset
CLK_SPD1 030h
Function
The CLK_SPD1 register is used to report the user-selectable speed settings (typically from switches) for the SYSCLK and
DDRCLK clocks.
Values in the CLK_SPD1 register are used by boot software accurately initialize timing-dependent parameters, such as for UART
baud rates, I2C clock rates, and DDR memory timing.
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 81 / 116
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