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Field Function
0
IEEE
1= Force RST_IEEESLT_B.
3.40 Reset Mask 1 (RST_MASK1)
Address
Register Offset
RST_MASK1 04Bh
Function
The RST_MASKn registers are used to block reset to a particular device, independent of the general reset sequencer. As long
as a bit is set to 1, the reset signal to that device or devices will be blocked.
RST_MASKn bits have the same arrangement as those in the RST_FORCEn registers.
Note that RST_MASK bits are cleared on AUX reset, and so can usually only be cleared by software, unlike the RST_FORCEn
registers.
Diagram
Bits
7 6 5 4 3 2 1 0
R
CLK XSPI QSFP I2CMUX EMMC
W
ARST
0 0 0 0 0 000
Fields
Field Function
7
CLK
1= Mask RST_CLKGEN_B.
6
XSPI
1= Mask RST_XSPI_B.
5
QSFP
1= Mask RST_QSFP_B.
4
I2CMUX
1= Mask RST_I2CMUX_B.
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NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 89 / 116
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