NXP Semiconductors QorIQ LX2160A - 3.41 Reset Mask 2 (RST_MASK2)

Diagram
Bits
7 6 5 4 3 2 1 0
R
IRQ9 IRQ10
W
CRST
00 00 00 00
Fields
Field Function
7-6
-
Reserved.
5-4
IRQ9
Sets mode of IRQ9 output:
00= Level-sensitive: drive IRQ9 low on interrupt input == 1.
01= Level-sensitive: drive IRQ9 high on interrupt input == 1.
10= Edge-triggered: drive IRQ9 low on a 0-to-1 edge.
11= Edge-triggered: drive IRQ9 high on a 0-to-1 edge.
Edge-triggered interrupts are cleared by reading the IRQCTL2 register.
3-2
IRQ10
Sets mode of IRQ10 output:
(same as IRQ9).
1-0
-
Reserved.
3.61 Interrupt Drive 0 (IRQDRV0)
Address
Register Offset
IRQDRV0 098h
Function
The IRQDRV0 register allows control of selected interrupt pins.
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 106 / 116