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Field Function
3
I2C40G
CS4223 40G PHY I2C Enable ((new CFG_CS4223_I2C_EN):
Grants access to the private I2C bus/boot memory used by the CS4223.
0= I2C bus inaccessible.
1= I2C bus accessible.
2
SLOTCLK
SLOTCLK controls whether PCIe slot clocks are enabled always, or only when a device is installed. This
may be useful when installing a larger PCIe device in a smaller slot (i.e. an x16 in an x8 slot).
0= Slot clocks enabled only when device installed.
1= Slot clocks enabled always.
1
SPRLVL
PCI Express Spread-Spectrum Spread Level:
0= -0.25% spread.
1= -0.50% spread.
Valid for Rev B or later boards only.
0
SPREAD
PCI Express Spread-Spectrum Enable (net CFG_SPREAD):
0= Disabled: PCI-Express 100 MHz clocks (all) are locked.
1= Enabled: PCI-Express 100 MHz clocks (all) are spread-spectrum modulated.
3.49 DUT Configuration Registers
This block of registers control the configuration of the DUT (Device Under Test). DUTCFG registers, unlike BRDCFG registers,
are not always driven - they are driven only during the reset configuration sampling interval (PORESET_B assertion), and remain
tri-stated thereafter. Refer to the device hardware specification for hardware pin-sampled timing parameters.
3.50 DUT Configuration 0 (DUTCFG0)
Address
Register Offset
DUTCFG0 060h
Function
The DUTCFG0 register is used to select the boot device used upon reset (cfg_rcw_src).
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 97 / 116
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