NXP does not make or supply this adapter cable.
NOTE
2.12 CAN interface
The LX2160A processor supports two controller area network (CAN) modules, CAN1 and CAN2. On the LX2160ARDB, the CAN
ports are available for external connection through a dual-port stacked DB9 male connector. Two high-speed CAN transceivers
(NXP TJA1051T/3) provide an interface for the CAN ports to send and receive CAN signals to and from the processor. The figure
below shows the CAN architecture.
CAN
XCVR
TJA1051T/3
CAN1
(bottom)
CAN2
(top)
CAN
XCVR
TJA1051T/3
3V3
5V
3V3
5V
OVDD (1.8 V)
NORCOMP
178-009-613R571
or equivalent
Dual-stack DB9 male
SN74LVC2T45
From CAN1
CFG_CAN_EN_B
From CPLD
From CAN2
SN74LVC2T45
Figure 24. CAN architecture
2.13 JTAG port
The JTAG port provides access to the processor using a standard 10-pin Arm Cortex JTAG connector for debugging purposes.
The following figure shows the LX2160ARDB JTAG architecture.
LX2160A
TMS
Arm
JTAG
header
FTSH-105-01-L-DV-K
TCK
TDO
TDI
49.9 K
JTAG_RST_B
4.7 K
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TCK
OVDD
8
6
9
7
5
3
4
2
1
10
To CPLD
OVDD
OVDD
Figure 25. JTAG architecture
2.14 Interrupt controller
Some of the LX2160A generic interrupt controller (GIC) pins are reserved for use with RTC and different Ethernet PHYs. The
remaining pins are used to merge various board-related interrupt sources for handling by the processor, or for general GPIO use.
The interrupts are connected as shown in the figure below.
NXP Semiconductors
LX2160ARDB Functional Description
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 38 / 116
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