3.17 Reconfiguration Registers
This block of registers controls the operation of the reconfiguration system, which is used to alter the configuration of the board
or processor into different voltages, SYSCLK frequencies, boot device selections, or any other configuration controlled by a
BRDCFG or DUTCFG register.
3.18 Reconfiguration Control (RCFG)
Address
Register Offset
RCFG 010h
Function
The RCFG register is used to control the reconfiguration sequencer.
Diagram
Bits
7 6 5 4 3 2 1 0
R LIVE
WDEN GO
W
CRST 00 1 0
~SW4[5]
00
RRST 0
Fields
Field Function
7-6
-
Reserved.
5
LIVE
Immediate changes for BRDCFG registers:
1= BRDCFG registers outputs occur immediately. For QixMin, LIVE is always 1.
4
-
Reserved.
3
WDEN
Watchdog Enable:
0= The watchdog is not enabled during reconfiguration.
1= The watchdog is enabled during reconfiguration. If not disabled within 2^29 clock cycles (> 8 minutes),
the system is reset.
NOTE: This is not a highly-secure watchdog; software can reset this bit at any time and disable the
watchdog.
2-1 Reserved.
Table continues on the next page...
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 70 / 116
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