NXP Semiconductors QorIQ LX2160A - 3.46 Board Configuration 2 (BRDCFG2)

Diagram
Bits
7 6 5 4 3 2 1 0
R
TMP_CTL
W
CRST
00 000000
Fields
Field Function
7-6
TMP_CTL
Allows control of the TA_TMP_DETECT_B pin.
0X= Undriven (Z).
10= Drive TA_TMP_DETECT_B low.
11= Drive TA_TMP_DETECT_B high.
The status of TA_TMP_DETECT_B can be monitored with the IRQSTAT registers.
5-0
-
Reserved.
3.65 Core Management Space Registers
The core management address/data registers allow access to internal Qixis control registers, primarily the direct switch access
registers which allow easy reporting of board configuration.
For RDB systems, only the following are defined:
CMS Registers
Address Name Definition
00 SW# Number of configuration switches.
01..0F SWn Image of configuration switch #n.
Ranges not listed are reserved.
A standard use of the CMSA/CMSD port is to read the state of configuration switches, for example:
Qixis_Set_Reg( CMS_A, 00h );
nr = Qixis_Get_Reg( CMS_D );
for (i = 1; i <= nr; i++) {
Qixis_Set_Reg( CMS_A, i );
printf("SW%1d = %02X\\ n", i, Qixis_Get_Reg( CMS_D ));
}
NXP Semiconductors
Qixis Programming Model
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 110 / 116