LX2160A
GPIO
event
header
90120-0125
4.7 K (weak)
(17 places)
OVDD
4
3
2
1
5
OVDD (1.8 V)
PHY_25G_LOL/IRQ1
IRQ6
IRQ_FAN_B/IRQ7
PHY_25G_LOL/IRQ9
PHY_25G_LOL/IRQ10
IRQ_QSFP_B/IRQ11
IRQ_40GE_B/IRQ0
IRQ_10G_PHY1_B/IRQ2
IRQ_10G_PHY2_B/IRQ3
IRQ_EPHY1_B/IRQ4
IRQ_EPHY2_B/IRQ5
IRQ_RTC_B/IRQ8
EVT0
EVT1
EVT2
EVT3
EVT4
CS4223 40 GbE PHY
AQR107 10 GbE PHY #1
AQR107 10 GbE PHY #2
AR8035 1 GbE PHY #1
AR8035 1 GbE PHY #2
RTC
IN112525 25 GbE PHY
IN112525 25 GbE PHY
IN112525 25 GbE PHY
zQSFP+ 40 GbE module
EMC2305 fan controller
Figure 27. GPIO interface
By programming the RCW “IRQ_EXT” field properly, an unused IRQ pin can be reassigned to GPIO purposes. Event signals
from EVT pins EVT[0:4] flow through a 5-pin GPIO header.
The table below shows the GPIO mapping in the LX2160ARDB.
Table 19. GPIO mapping
LX2160A pin LX2160A GPIO function LX2160A primary function
IRQ0 GPIO3[0] IRQ_40GE_B
IRQ1 GPIO3[1] PHY_25G_LOL
IRQ2 GPIO3[2] IRQ_10G_PHY1_B
IRQ3 GPIO3[3] IRQ_10G_PHY2_B
IRQ4 GPIO3[4] IRQ_EPHY1_B
IRQ5 GPIO3[5] IRQ_EPHY2_B
IRQ6 GPIO3[6]
IRQ7 GPIO3[7] IRQ_FAN_B
IRQ8 GPIO3[8] IRQ_RTC_B
IRQ9 GPIO3[9] PHY_25G_LOL (if SFP2_MOD_ABS is low)
IRQ10 GPIO3[10] PHY_25G_LOL (if SFP3_MOD_ABS is low)
IRQ11 GPIO3[11] IRQ_QSFP_B
EVT0_B GPIO3[12]
EVT1_B GPIO3[13]
Table continues on the next page...
NXP Semiconductors
LX2160ARDB Functional Description
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 40 / 116