NXP Semiconductors QorIQ LX2160A - Page 43

Switch Supported function Description
Bit value XSPI_A_CS0 XSPI_A_CS1 Description
001 DEV#1 DEV#0 Boot from
alternative flash
memory
010 QSPI emulator DEV#0 Boot from QSPI
emulator,
program default
flash memory
011 QSPI emulator DEV#1 Boot from QSPI
emulator,
program
alternative flash
memory
100 DEV#0 QSPI emulator Emulator access
SW2[1] PCIe Spread-Spectrum
enable
CFG_SPREAD
SW_SPREAD
• 0: 100 MHz clocks for PCIe slots are fixed (default setting)
• 1: 100 MHz clocks for PCIe slots are spread-spectrum modulated
SW2[2] CS4223 configuration
CFG_40GE_ROM
SW_INIT40GE
• 0: CS4223 40 GbE PHY is not self-configured (default setting)
• 1: CS4223 40 GbE PHY is self-configured on reset
SW2[3] PCIe slot clock enable
CFG_CLKEN_SLOT[1:2]_B
SW_SLOTCLK
• 0: PCIe slots are clocked only when a card is installed (default setting)
• 1: PCIe slots are clocked always
SW2[4:5] Unused Reserved with 00 as the default settings
SW2[6] Extended DDR PHY Reset
Timing mode
CFG_ENG_USE0
SW_RSTDLY / SW_ENGUSE0
• 0: Extended (delayed) reset timing for DDR PHY (default setting)
• 1: Standard reset timing for DDR PHY
These settings are only valid for LX2160A silicon revision
2.0 or later.
NOTE
SW2[7] Unused
CFG_ENG_USE1
SW_ENGUSE1
Reserved with 1 as the default setting
SW2[8] DDR clock source selection
CFG_ENG_USE2
SW_DDRSRC / SW_ENGUSE2
• 0: DDR clocked from DDRCLK pin (default setting)
• 1: DDR clocked from differential SYSCLK
Table continues on the next page...
NXP Semiconductors
LX2160ARDB Functional Description
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 4, 07/2020
Reference Manual 43 / 116