Omron CQM1H - PROGRAM User Manual

346
Special Math Instructions Section 5-23
Enter the coordinates of the m+1 end-points, which define the m line seg-
ments, as shown in the following table. Enter all coordinates in BIN form.
Always enter the coordinates from the lowest X value (X
1
) to the highest (X
m
).
X
0
is 0000, and does not have to be entered.
If bit 13 of C is set to 1, the graph will be reflected from left to right, as shown
in the following diagram.
The following example demonstrates the construction of a linear approxima-
tion with 12 line segments. The block of data is continuous, as it must be, from
DM 0000 to DM 0026 (C to C + (2
× 12 + 2)). The input data is taken from IR
010, and the result is output to IR 011.
Word Coordinate
C+1 X
m
(max. X value)
C+2 Y
0
C+3 X
1
C+4 Y
1
C+5 X
2
C+6 Y
2
↓ ↓
C+(2m+1) X
m
C+(2m+2) Y
m
Y
0
X
0
X
1
X
2
X
3
X
4
X
m
X
Y
Y
m
Y
4
Y
3
Y
1
Y
2
X
0
X
m
X
Y
X
m
X
0
X
Y
DM 0000 $C00B
DM 0001 $05F0 X
12
DM 0002 $0000 Y
0
DM 0003 $0005 X
1
DM 0004 $0F00 Y
1
DM 0005 $001A X
2
DM 0006 $0402 Y
2
↓
DM 0025 $05F0 X
12
DM 0026 $1F20 Y
12
APR(−−)
DM 0000
010
011
00000
1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 1
Bit
15
Bit
00
(Output and
input both BIN)
(m−1 = 11: 12 line
segments)
Content Coordinate
Address Instruction Operands
00000 LD 00000
00001 APR(−−)
DM 0000
010
011
↓↓

Omron CQM1H - PROGRAM Specifications

General

I/O Capacity	Up to 512 points
Power Supply	100 to 240 VAC, 50/60 Hz or 24 VDC (depending on model)
Instruction Set	Basic and advanced instructions
Operating Temperature	0 to 55°C
Program Capacity	7.2K to 15.2K steps
Communication Ports	RS-232C
Expansion Slots	Up to 3 expansion units
Type	Programmable Logic Controller (PLC)
CPU Type	RISC
Program Memory	7.2K to 15.2K steps
I/O Points	512 max
Expansion Capability	Up to 3 expansion units
Data Memory	RAM (battery backup)

Summary

PRECAUTIONS

1 Intended Audience

Specifies the target personnel for this manual, requiring knowledge of electrical systems and FA systems.

2 General Precautions

Outlines user responsibilities for operating the product according to specifications and consulting representatives for specific applications.

3 Safety Precautions

Details critical safety warnings related to I/O refreshing, touching internal components, disassembly, and power supply handling.

5 Application Precautions

Provides essential safety guidelines for using the PC System, including grounding, power handling, and unit mounting.

SECTION 1 PC Setup and Other Features

1-1 PC Setup

Explains operating parameters for CQM1H control, including default values and how to change them.

SECTION 2 Inner Boards

2-1 High-speed Counter Board

Describes the functions, input modes, comparison operations, and external outputs of the High-speed Counter Board.

2-2 Pulse I/O Board

Details the Pulse I/O Board's support for two pulse inputs and two pulse outputs, including input modes and interrupts.

SECTION 3 Memory Areas

3-1 Memory Area Structure

Explains the memory areas used by the CQM1H PC, including IR, Work, Controller Link status, MACRO operand, Inner Board, Analog, High-speed Counter, and EM areas.

SECTION 4 Ladder-diagram Programming

4-1 Basic Procedure

Outlines the fundamental steps for writing a program, including obtaining I/O lists and drawing ladder diagrams.

4-4 Controlling Bit Status

Details instructions for controlling individual bit status: OUTPUT, OUTPUT NOT, SET, RESET, DIFFERENTIATE UP/DOWN, KEEP.

4-6 Programming Precautions

Provides essential precautions for drawing clear ladder diagrams and inputting programs, emphasizing instruction order and TR bits.

4-7 Program Execution

Describes the CPU Unit's program scan from top to bottom, checking conditions, and executing instructions.

SECTION 5 Instruction Set

SECTION 6 Host Link Commands

6-1 Host Link Command Summary

Provides a summary table of Host Link commands available for CQM1H communications.

6-4 Command and Response Formats

Details the formats for commands issued from the host computer and responses received from the PC.

6-5 Host Link Commands

Lists and describes various Host Link commands for reading and writing data in IR, SR, LR, HR, DM, EM, and AR areas.

SECTION 7 CPU Unit Operation and Processing Time

7-1 CPU Unit Operation

Explains the overall operation flowchart of the CQM1H CPU Unit and defines cycle time.

7-2 Power Interruptions

Details the CPU Unit's behavior during power interruptions and momentary power supply failures.

7-3 Cycle Time

Explains the processes involved in a single execution cycle and their respective processing times.

SECTION 8 Troubleshooting

8-2 Programming Console Operation Errors

Lists common error messages encountered when using the Programming Console and their appropriate responses.

8-3 Programming Errors

8-5 Operating Errors

8-6 Error Log

8-7 Troubleshooting Flowcharts

Appendix A Programming Instructions

5-8 Ladder Diagram Instructions

Explains basic instructions like LOAD, AND, OR, and their combinations, including logic block instructions.

5-9 Bit Control Instructions

Covers instructions for controlling individual bit status: OUT, OUT NOT, SET, RESET, DIFU, DIFD, KEEP.

5-14 User Error Instructions: FAILURE ALARM AND RESET – FAL(06) and SEVERE FAILURE ALARM – FALS(07)

Describes instructions for outputting error numbers for operation, maintenance, and debugging, including non-fatal and fatal errors.

5-16 Timer and Counter Instructions

Details instructions for managing timers and counters, including TIM, TIMH, CNT, CNTR, TTIM, STIM, and CTBL.

5-29 Network Instructions

Explains instructions for communicating with other PCs via the Controller Link System, including SEND, RECV, and CMND.

5-30 Communications Instructions

Details instructions for serial communications, including RECEIVE (RXD), TRANSMIT (TXD), CHANGE SERIAL PORT SETUP (STUP), and PROTOCOL MACRO (PMCR).