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Omron CQM1H - PROGRAM User Manual

Omron CQM1H - PROGRAM
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445
Command and Response Formats Section 6-4
Precautions for Long Transmissions
When dividing commands such as WR, WL, WC, or WD that execute write
operations, be careful not to divide into separate frames data that is to be writ-
ten into a single word. As shown in the illustration below, be sure to divide
frames so that they coincide with the divisions between words.
FCS (Frame Check
Sequence)
When a frame is transmitted, an FCS is placed just before the delimiter or ter-
minator in order to check whether any data error has been generated. The
FCS is 8-bit data converted into two ASCII characters. The 8-bit data is the
result of an EXCLUSIVE OR performed on the data from the beginning of the
frame until the end of the text in that frame (i.e., just before the FCS). Calcu-
lating the FCS each time a frame is received and checking the result against
the FCS that is included in the frame makes it possible to check for data
errors in the frame.
@
00WD
FCS
*
Frame 1
Node
No.
Header
code
Data
One word of data
Data from the same word is not divided.
Frame 3
Terminator
Data
Delimiter
One word of data
Data from the same word is not divided.
FCS
01RR00@ 0142*
FCSTex t
Node No.
Header code
FCS calculation range
Terminator
@ 40 0100 0000
XOR
1 31 0011 0001
XOR
0 30 0011 0000
XOR
R 52 0101 0010
1 31 0011 0001
0100 0010
↓↓ Converted to hexadecimal.
4 2 Handled as ASCII characters.
ASCII code
Calculation
result

Table of Contents

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Omron CQM1H - PROGRAM Specifications

General IconGeneral
I/O CapacityUp to 512 points
Power Supply100 to 240 VAC, 50/60 Hz or 24 VDC (depending on model)
Instruction SetBasic and advanced instructions
Operating Temperature0 to 55°C
Program Capacity7.2K to 15.2K steps
Communication PortsRS-232C
Expansion SlotsUp to 3 expansion units
TypeProgrammable Logic Controller (PLC)
CPU TypeRISC
Program Memory7.2K to 15.2K steps
I/O Points512 max
Expansion CapabilityUp to 3 expansion units
Data MemoryRAM (battery backup)

Summary

PRECAUTIONS

1 Intended Audience

Specifies the target personnel for this manual, requiring knowledge of electrical systems and FA systems.

2 General Precautions

Outlines user responsibilities for operating the product according to specifications and consulting representatives for specific applications.

3 Safety Precautions

Details critical safety warnings related to I/O refreshing, touching internal components, disassembly, and power supply handling.

5 Application Precautions

Provides essential safety guidelines for using the PC System, including grounding, power handling, and unit mounting.

SECTION 1 PC Setup and Other Features

1-1 PC Setup

Explains operating parameters for CQM1H control, including default values and how to change them.

SECTION 2 Inner Boards

2-1 High-speed Counter Board

Describes the functions, input modes, comparison operations, and external outputs of the High-speed Counter Board.

2-2 Pulse I/O Board

Details the Pulse I/O Board's support for two pulse inputs and two pulse outputs, including input modes and interrupts.

SECTION 3 Memory Areas

3-1 Memory Area Structure

Explains the memory areas used by the CQM1H PC, including IR, Work, Controller Link status, MACRO operand, Inner Board, Analog, High-speed Counter, and EM areas.

SECTION 4 Ladder-diagram Programming

4-1 Basic Procedure

Outlines the fundamental steps for writing a program, including obtaining I/O lists and drawing ladder diagrams.

4-4 Controlling Bit Status

Details instructions for controlling individual bit status: OUTPUT, OUTPUT NOT, SET, RESET, DIFFERENTIATE UP/DOWN, KEEP.

4-6 Programming Precautions

Provides essential precautions for drawing clear ladder diagrams and inputting programs, emphasizing instruction order and TR bits.

4-7 Program Execution

Describes the CPU Unit's program scan from top to bottom, checking conditions, and executing instructions.

SECTION 5 Instruction Set

SECTION 6 Host Link Commands

6-1 Host Link Command Summary

Provides a summary table of Host Link commands available for CQM1H communications.

6-4 Command and Response Formats

Details the formats for commands issued from the host computer and responses received from the PC.

6-5 Host Link Commands

Lists and describes various Host Link commands for reading and writing data in IR, SR, LR, HR, DM, EM, and AR areas.

SECTION 7 CPU Unit Operation and Processing Time

7-1 CPU Unit Operation

Explains the overall operation flowchart of the CQM1H CPU Unit and defines cycle time.

7-2 Power Interruptions

Details the CPU Unit's behavior during power interruptions and momentary power supply failures.

7-3 Cycle Time

Explains the processes involved in a single execution cycle and their respective processing times.

SECTION 8 Troubleshooting

8-2 Programming Console Operation Errors

Lists common error messages encountered when using the Programming Console and their appropriate responses.

Appendix A Programming Instructions

5-8 Ladder Diagram Instructions

Explains basic instructions like LOAD, AND, OR, and their combinations, including logic block instructions.

5-9 Bit Control Instructions

Covers instructions for controlling individual bit status: OUT, OUT NOT, SET, RESET, DIFU, DIFD, KEEP.

5-14 User Error Instructions: FAILURE ALARM AND RESET – FAL(06) and SEVERE FAILURE ALARM – FALS(07)

Describes instructions for outputting error numbers for operation, maintenance, and debugging, including non-fatal and fatal errors.

5-16 Timer and Counter Instructions

Details instructions for managing timers and counters, including TIM, TIMH, CNT, CNTR, TTIM, STIM, and CTBL.

5-29 Network Instructions

Explains instructions for communicating with other PCs via the Controller Link System, including SEND, RECV, and CMND.

5-30 Communications Instructions

Details instructions for serial communications, including RECEIVE (RXD), TRANSMIT (TXD), CHANGE SERIAL PORT SETUP (STUP), and PROTOCOL MACRO (PMCR).

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