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Renesas H8 Series - Page 236

Renesas H8 Series
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214
(f) While emulating the H8/36049 group, note that the register specifications at address H’F608 in the actual
device and expansion I/O board (HS36024EIO61H) are different. Table 8.41 lists the specifications and
note on them.
Table 8.42 Register Specifications and Note
Item Register Specifications Note
HS36024EIO61H Bits 4 to 7 (1111): Reserved
Bit 3 (0): Selects the device (1: H8/36049)
Bit 2 (0): Selects whether or not to delete
noise (0: no, 1: yes)
Bit 1 (0): Selects the TXD3 output (0: port, 1:
TXD_3)
Bit 0 (0): Selects whether or not to stop
modules (0: operate, 1: stop)
None
H8/36049 Bits 4 to 7 (1111): Reserved
Bit 3 (1):Reserved (always read as 1 and
writing has no effect)
Bit 2 (0): Selects whether or not to delete
noise (0: no, 1: yes)
Bit 1 (0): Selects the TXD3 output (0: port, 1:
TXD_3)
Bit 0 (0): Selects whether or not to stop
modules (0: operate, 1: stop)
For emulation with the
expansion I/O board
(HS36024EIO61H), set
bits 3 to ‘1’.
Note: The value in parentheses indicates the initial value after a reset.

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