RL78/F13, F14 CHAPTER 16 SERIAL INTERFACE IICA
R01UH0368EJ0210 Rev.2.10 1022
Dec 10, 2015
16.3 Registers Controlling Serial Interface IICA
Serial interface IICA is controlled by the following eight registers.
• Peripheral enable register 0 (PER0)
• IICA control register 00 (IICCTL00)
• IICA flag register 0 (IICF0)
• IICA status register 0 (IICS0)
• IICA control register 01 (IICCTL01)
• IICA low-level width setting register 0 (IICWL0)
• IICA high-level width setting register 0 (IICWH0)
• Port mode register 6 (PM6)
• Port register 6 (P6)
• Port output mode register 6 (POM6)
16.3.1 Peripheral enable register 0 (PER0)
This register is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a hardware
macro that is not used is stopped in order to reduce the power consumption and noise.
When serial interface IICA0 is used, be sure to set bit 4 (IICA0EN) of this register to 1.
The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 16-5. Format of Peripheral Enable Register 0 (PER0)
Address: F00F0H After reset: 00H R/W
Symbol <7> 6 <5> <4> <3> <2> <1> <0>
PER0 RTCEN 0 ADCEN
IICA0EN
Notes1, 2
SAU1EN
Note1
SAU0EN
TAU1EN
Note1
TAU0EN
IICA0EN Control of serial interface IICA0 input clock supply
0
Stops input clock supply.
ï‚· SFR used by serial interface IICA0 cannot be written.
ï‚· Serial interface IICA0 is in the reset status.
1
Enables input clock supply.
ï‚· SFR used by serial interface IICA0 can be read/written.
Notes 1. Not provided in the products of the RL78/F13 (LIN incorporated) with 20, 30, 32, 48, or 64 pins and
16 Kbytes to 64 Kbytes of code flash memory.
2. Not provided in the 30-pin products of the RL78/F13 (CAN and LIN incorporated) and the 30-pin
products of the RL78/F14.
Cautions 1. When setting serial interface IICA0, be sure to set the IICA0EN bit to 1 first. If IICA0EN =
0, writing to a control register of serial interface IICA0 is ignored, and, even if the register
is read, only the default value is read (except for port mode register 6 (PM6) and port
register 6 (P6)).
2. Be sure to clear the following bits to 0.
Bits 1, 3, 4, and 6 in the RL78/F13 (LIN incorporated) products with 20, 30, 32, 48, or 64
pins and 16 Kbytes to 64 Kbytes of code flash memory.
Bits 4 and 6 in the 30-pin products of the RL78/F13 (CAN and LIN incorporated) and 30-
pin products of the RL78/F14
Bit 6 in the products other than above