RL78/F13, F14 CHAPTER 5 CLOCK GENERATOR
R01UH0368EJ0210 Rev.2.10 377
Dec 10, 2015
5.3.5 Oscillation Stabilization Time Select Register (OSTS)
This register is used to select the X1 clock oscillation stabilization wait time.
When the X1 clock is oscillated, the operation automatically waits for the time set using the OSTS register.
When oscillation of the X1 clock starts, confirm with the oscillation stabilization time counter status register (OSTC) that
the desired oscillation stabilization time has elapsed. The oscillation stabilization time can be checked up to the time
set using the OSTC register.
Set the OSTS register by an 8-bit memory manipulation instruction.
Writing to the OSTS register is disabled when the GCSC bit of the IAWCTL register is set to 1.
Reset signal generation sets the OSTS register to 07H.
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