RL78/F13, F14 CHAPTER 19 DTC
R01UH0368EJ0210 Rev.2.10 1445
Dec 10, 2015
19.2.14 High-speed DTC Channel Select Register 1 (SELHS1)
The SELHS1 register is an 8-bit register that is used to select the high-speed DTC channel.
Figure 19-14. Format of High-speed DTC Channel Select Register 1 (SELHS1)
Symbol 7 6 5 4 3 2 1 0
SELHS1 0 0 SELHS15 SELHS14 SELHS13 SELHS12 SELHS11 SELHS10
The SELHS1 register can be set with an 8-bit or 1-bit memory manipulation instruction, not set with a 16-bit memory
manipulation instruction.
After reset: 3FH
Address: F02E2H
Correspondence between the activation sources and SELHS1i (i = 0 to 5) bits is shown below.
SELHS15 to SELHS10 Description
0 0 0 0 0 0 Activation source number 0 is selected as high-speed channel 1.
0 0 0 0 0 1 Activation source number 1 is selected as high-speed channel 1.
0 0 0 0 1 1 Activation source number 2 is selected as high-speed channel 1.
:
:
:
:
1 0 1 0 1 1 Activation source number 43 is selected as high-speed channel 1.
1 0 1 1 0 0 Activation source number 44 is selected as high-speed channel 1.
1 0 1 1 0 1 Activation source number 45 is selected as high-speed channel 1.
1 1 1 1 1 1 High-speed channel 1 is not used.
Other than above Setting prohibited
Cautions 1. Modify the data of the SELHS1 register when the corresponding bit among bits DTCENi0 to
DTCENi7 in the DTCENi (i = 0 to 5
Note
) register is 0 (DTC activation disabled).
2. Do not access the SELHS1 register using a DTC transfer.
Note Products of groups A, B, C, and D: i = 0 to 4
Products of group E: i = 0 to 5
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