RL78/F13, F14 CHAPTER 4 PORT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 336
Dec 10, 2015
4.3.14 Peripheral I/O redirection register 5 (PIOR5)
This register is used to specify whether to enable or disable the peripheral I/O redirect function.
PIOR5 enables or disables redirection of the external interrupt input and key interrupt input; that is, it specifies which
I/O port is assigned to each external interrupt input pin or key interrupt input pin.
This register can be set by an 8-bit memory manipulation instruction.
Bits 7 to 4 and 1 are read-only because no functions are assigned to them. The other bits can be read or written to.
After reset cancellation, this register can always be read or written to.
Any reset source clears this register to 00H.
Figure 4-87. Format of Peripheral I/O Redirection Register 5 (PIOR5)
Address: F001BH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
PIOR5 0 0 0 0 PIOR53 PIOR52 0 PIOR50
Bit Function 100-pin 80-pin 64-pin 48-pin 32-pin 30-pin 20-pin
Setting value Setting value Setting value Setting value Setting value Setting value Setting value
0 1 0 1 0 1 0 1 0 1 0 1 0 1
PIOR53 INTP3 P17 P50 P17 P50 P17 P50 P17  P17  P17  P17 
PIOR52 INTP2 P30 P31 P30 P31 P30 P31 P30 P31 P30  P30  P30 
PIOR50 KR7 P77  P77  P77 P96  P92    P87  
KR6 P76  P76  P76 P95  P91    P86  
KR5 P75  P75  P75 P94  P90  P85  P85  
KR4 P74  P74  P74 P93  P87  P84  P84  
KR3 P73  P73  P73 P92 P73 P86  P83  P83  
KR2 P72  P72  P72 P91 P72 P85  P82  P82  
KR1 P71  P71  P71 P90 P71 P84  P81  P81  P81
KR0 P70  P70  P70 P87 P70 P83  P80  P80  P80
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