Renesas RL78/D1A User Manual

RL78/F13, F14 CHAPTER 5 CLOCK GENERATOR
R01UH0368EJ0210 Rev.2.10 369
Dec 10, 2015
5.3 Registers Controlling Clock Generator
The following registers are used to control the clock generator.
 Clock operation mode control register (CMC)
 System clock control register (CKC)
 Clock operation status control register (CSC)
 Oscillation stabilization time counter status register (OSTC)
 Oscillation stabilization time select register (OSTS)
 Peripheral enable registers 0, 1, 2 (PER0, PER1, PER2)
 Operation speed mode control register (OSMC)
 High-speed on-chip oscillator frequency select register (HOCODIV)
 High-speed on-chip oscillator trimming register (HIOTRM)
 CAN clock select register (CANCKSEL)
 LIN clock select register (LINCKSEL)
 Clock select register (CKSEL)
 PLL control register (PLLCTL)
 PLL status register (PLLSTS)
 f
MP clock division register (MDIV)
5.3.1 Clock Operation Mode Control Register (CMC)
This register is used to set the operation mode of the X1/P121, X2/EXCLK/P122, XT1/P123, and XT2/EXCLKS/P124
pins, and to select a gain of the oscillator.
The CMC register can be written only once by an 8-bit memory manipulation instruction after reset release. This register
can be read by an 8-bit memory manipulation instruction.
Writing to the CMC register is disabled when the GCSC bit of the IAWCTL register is set to 1.
Reset signal generation sets this register to 00H.

Renesas RL78/D1A Specifications

General

Brand	Renesas
Model	RL78/D1A
Category	Computer Hardware
Language	English