Renesas RL78/D1A User Manual

RL78/F13, F14 CHAPTER 5 CLOCK GENERATOR
R01UH0368EJ0210 Rev.2.10 375
Dec 10, 2015
Table 5-2. Condition Before Stopping Clock Oscillation and Flag Setting
Clock Condition Before Stopping Clock
(Invalidating External Clock Input)
Setting of CSC
Register Flags
X1 clock
CPU and peripheral hardware clocks operate with a clock
other than the high-speed system clock or PLL clock (source
clock = high-speed system clock).
(CLS (bit 7 of the CKC register) = 0 and MCS (bit 5 of the
CKC register) = 0, or CLS = 1)
MSTOP = 1
External main system
clock
XT1 clock CPU and peripheral hardware clocks operate with a clock
other than the subsystem clock.
(CLS = 0, or CLS = 1 and SELLOSC (bit 0 of the CKSEL
register) = 1)
XTSTOP = 1
External subsystem
clock
High-speed on-chip
oscillator clock
CPU and peripheral hardware clocks operate with a clock
other than the high-speed on-chip oscillator clock or PLL
clock (source clock = high-speed on-chip oscillator clock).
(CLS = 0 and MCS = 1, or CLS = 1)
HIOSTOP = 1
5.3.4 Oscillation Stabilization Time Counter Status Register (OSTC)
This is the register that indicates the count status of the X1 clock oscillation stabilization time counter.
The X1 clock oscillation stabilization time can be checked in the following case,
 If the X1 clock starts oscillation while the high-speed on-chip oscillator clock or subsystem/low-speed on-chip
oscillator select clock is being used as the CPU clock.
 If the STOP mode is entered and then released while the high-speed on-chip oscillator clock is being used as the
CPU clock with the X1 clock oscillating.
The OSTC register can be read by a 1-bit or 8-bit memory manipulation instruction.
The generation of reset signal, the STOP instruction and MSTOP (bit 7 of clock operation status control register (CSC))
= 1 clear the OSTC register to 00H.
Remark The oscillation stabilization time counter starts counting in the following cases.
 When oscillation of the X1 clock starts (when EXCLK of the CMC register = 0 and OSCSEL of the CMC
register = 1, MSTOP of the CSC register = 0)
 When the STOP mode is released

Renesas RL78/D1A Specifications

General

Brand	Renesas
Model	RL78/D1A
Category	Computer Hardware
Language	English