RL78/F13, F14 CHAPTER 6 TIMER ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 438
Dec 10, 2015
6.2.2 Timer data register mn (TDRmn)
This is a 16-bit register from which a capture function and a compare function can be selected.
The capture or compare function can be switched by selecting an operation mode by using the MDmn3 to MDmn0
bits of timer mode register mn (TMRmn).
When the TDRmn register is used for compare function, the value can be changed at any time.
This register can be read or written in 16-bit units.
In addition, for the TDRm1 and TDRm3 registers, while in the 8-bit timer mode (when the SPLIT bits of timer mode
registers 01 and 03 (TMRm1, TMRm3) are 1), it is possible to rewrite the data in 8-bit units, with TDRm1H and
TDRm3H used as the higher 8 bits, and TDRm1L and TDRm3L used as the lower 8 bits. However, reading is only
possible in 16-bit units.
Reset signal generation clears this register to 0000H.
Figure 6-8. Format of Timer Data Register mn (TDRmn) (n = 0, 2, 4 to 7)
Address: FFF18H, FFF19H (TDR00), FFF64H, FFF65H (TDR02), After reset: 0000H R/W
FFF68H, FFF69H (TDR04) to FFF6EH, FFF6FH (TDR07)
FFF70H, FFF71H (TDR10), FFF74H, FFF75H (TDR12)
FFF78H, FFF79H (TDR14) to FFF7EH, FFF7FH (TDR17)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TDRmn
Figure 6-9. Format of Timer Data Register mn (TDRmn) (n = 1, 3)
Address: FFF1AH, FFF1BH (TDR01), FFF66H, FFF67H (TDR03), After reset: 0000H R/W
FFF72H, FFF73H (TDR11), FFF76H, FFF77H (TDR13)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TDRmn
(i) When timer data register mn (TDRmn) is used as compare register
Counting down is started from the value set to the TDRmn register. When the count value reaches 0000H, an
interrupt signal (INTTMmn) is generated. The TDRmn register holds its value until it is rewritten.
Caution The TDRmn register does not perform a capture operation even if a capture trigger is input,
when it is set to the compare function.
(ii) When timer data register mn (TDRmn) is used as capture register
The count value of timer count register mn (TCRmn) is captured to the TDRmn register when the capture trigger
is input.
A valid edge of the TImn pin can be selected as the capture trigger. This selection is made by timer mode register
mn (TMRmn).
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
FFF19H (TDR00)
FFF18H (TDR00)
FFF1BH (TDR01H)
FFF1AH (TDR01L)
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