RL78/F13, F14 CHAPTER 12 A/D CONVERTER
R01UH0368EJ0210 Rev.2.10 707
Dec 10, 2015
12.3.2 A/D converter mode register 0 (ADM0)
This register sets the conversion time for analog input to be A/D converted, and starts/stops conversion.
The ADM0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 12-3. Format of A/D Converter Mode Register 0 (ADM0)
Notes 1. For details of the FR2 to FR0, LV1, LV0 bits, and A/D conversion, see Table 12-3 A/D
Conversion Time Selection.
2. While in the software trigger mode or hardware trigger no-wait mode, the operation of the A/D
voltage comparator is controlled by the ADCS and ADCE bits, and it takes 1 s from the start
of operation for the operation to stabilize. Therefore, when the ADCS bit is set to 1 after 1 s
or more has elapsed from the time ADCE bit is set to 1, the conversion result at that time has
priority over the first conversion result. Otherwise, ignore data of the first conversion.
3. The ADCS bit is not set when 1 is written to it and 0 is written to the ADCE bit. The ADCS bit
is read as 0.
4. The ADCS bit cannot be used as the flag of conversion operation status in the hardware
trigger no-wait mode.
Cautions 1. Change the ADMD, FR2 to FR0, LV1, LV0, and ADCE bits in the conversion
stopped/standby status (ADCS = 0).
2. Do not change the ADCS and ADCE bits from 0 to 1 by using an 8-bit manipulation
instruction. Be sure to set these bits in the order described in 12.7 A/D Converter
Setup Flowchart.
ADCELV0
Note 1
Note 3
Note 3
Note 4
LV1
Note 1
FR0
Note 1
FR1
Note 1
FR2
Note 1
ADMDADCS
A/D conversion operation control
Stops conversion operation
[When read]
Conversion stopped/standby status
ADCS
0
<0>123456<7>
ADM0
Address: FFF30H After reset: 00H R/W
Symbol
Specification of the A/D conversion channel selection mode
Select mode
Scan mode
ADMD
0
1
A/D voltage comparator operation control
Note 2
Stops A/D voltage comparator operation
Enables A/D voltage comparator operation
0
1
ADCE
Enables conversion operation
[When read
Note 2
]
While in the software trigger mode: Conversion operation status
While in the hardware trigger wait mode: Stabilization wait status + conversion
operation status
1
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