RL78/F13, F14 CHAPTER 3 CPU ARCHITECTURE
R01UH0368EJ0210 Rev.2.10 141
Dec 10, 2015
(d) Auxiliary carry flag (AC)
If the operation result has a carry from bit 3 or a borrow at bit 3, this flag is set (1). It is reset (0) in all other cases.
(e) In-service priority flags (ISP1, ISP0)
This flag manages the priority of acknowledgeable maskable vectored interrupts. Vectored interrupt requests
specified lower than the value of ISP0 and ISP1 flags by the priority specification flag registers (PRn0L, PRn0H,
PRn1L, PRn1H, PRn2L, PRn2H, PRn3L) (see 21.3.3 Priority specification flag registers (PR00L, PR00H,
PR01L, PR01H, PR02L, PR02H, PR03L, PR10L, PR10H, PR11L, PR11H, PR12L, PR12H, PR13L)) can not be
acknowledged.
Actual request acknowledgment is controlled by the interrupt enable flag (IE).
Remark n = 0, 1
(f) Carry flag (CY)
This flag stores overflow and underflow upon add/subtract instruction execution. It stores the shift-out value upon
rotate instruction execution and functions as a bit accumulator during bit operation instruction execution.
(3) Stack pointer (SP)
This is a 16-bit register to hold the start address of the memory stack area. Only the internal RAM area can be set as
the stack area.
Figure 3-38. Format of Stack Pointer
The SP is decremented ahead of write (save) to the stack memory and is incremented after read (restored) from the
stack memory.
Each stack operation saves data as shown in Figure 3-39.
Cautions 1. Since reset signal generation makes the SP contents undefined, be sure to initialize the SP before
using the stack.
2. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space as a stack area.
3. The internal RAM in the following products cannot be used as stack memory when using the
self-programming and data flash function. However, the area to which this prohibition applies
may vary with the version of the library. For details, refer to the manual for the individual library.
R5F10AmE (m = 6, A, B, G, L): FEF00H to FF2FFH
R5F10PmF (m = G, L, M): FDF00H to FE2FFH
R5F10AmG (m = G, L, M), R5F10BnG (n = A, B, G, L, M): FDF00H to FE2FFH
R5F10PmJ (m = G, L, M, P): FAF00H to FB2FFH
4. The internal RAM in the following products cannot be used as stack memory when using the
tracing function of on-chip debugging.
R5F10AmE (m = 6, A, B, G, L), R5F10AnD (n = 6, A, B, G, L): FF300H to FF37FH
R5F10AmG (m = G, L, M), R5F10BnG (n = A, B, G, L, M): FE300H to FE4FFH
R5F10PmF (m = G, L, M): FE300H to FE4FFH
R5F10PmJ (m = G, L, M, P): FB300H to FB4FFH
5. The internal RAM in the following products cannot be used as stack memory when the hot plug-
in function is used or when the DTC is in use for the RRM or DMM function.
R5F10AmD, R5F10AmE (m = 6, A, B, G, L): FF400H to FF42FH
R5F10AmG (m = G, L, M), R5F10BnG (n = A, B, G, L, M): FE500H to FE52FH
15
SP
SP15 SP14 SP13 SP12 SP11 SP10
SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
0
To Next Page
Loading...
Need help?
General
