RL78/F13, F14 CHAPTER 8 TIMER RD
R01UH0368EJ0210 Rev.2.10 622
Dec 10, 2015
(5) Event Input from Event Link Controller (ELC)
Timer RD performs two operations by event input from the ELC.
The ELC is only available in the RL78/F14.
(a) Input capture operation D0/D1
Timer RD performs input capture operation D0/D1 by event input from the ELC. The IMFD bit in the TRDSRi
register is set to 1 at this time. To use this function, select the input capture function in timer mode and set the
ELCICE0 or ELCICE1 bit in the TRDELC register to 1. This function is disabled in any other modes (for the
output compare function in timer mode, PWM function, reset synchronous PWM mode, complementary PWM
mode, and PWM3 mode).
(b) Pulse output forced cutoff operation
Note
The pulse output is forcibly cutoff by event input from the ELC. To use this function, select pulse output mode
(PWM function, reset synchronous PWM mode, complementary PWM mode, or PWM3 mode) and set the
ELCOBE0 or ELCOBE1 bit to 1. This function is disabled for the input capture function in timer mode.
Note The pulse output is cutoff during the low input period for forced cutoff from the INTP0 pin, but the pulse output is
cutoff once by a single event input from the ELC for forced cutoff by the ELC event.
[Setting Procedure]
(1) Set timer RD as the ELC event link destination.
(2) Set bits ELCICEi (i = 0 or 1) and ELCOBEi (i = 0 or 1) to 1 in the TRDELC register.
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