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Renesas RL78/D1A User Manual

Renesas RL78/D1A
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RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 888
Dec 10, 2015
Figure 15-68. Flowchart of Slave Transmission/Reception (in Single-Transmission/Reception Mode)
Caution Be sure to set transmit data to the SDRpL register before the clock from the master is started.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), p: CSI number (p = 00, 01, 10, 11),
mn = 00, 01, 10, 11
Starting CSI communication
Port manipulation
Setting the SAU1EN and SAU0EN bits of the
PER0 register to 1
No
Writing 1 to the SSmn bit
Writing transfer data to the SDRmn register
Transfer end interrupt
generated?
Reading the SDRmn register
Setting the SAU1EN and SAU0EN bits of the
PER0 register to 0
End of communication
No
Starting transmission/reception
Transmission/reception
completed?
Writing 1 to the STmn bit
Yes
Yes
Specify the initial settings while
the SEmn bit is 0.
SMRmn, SCRmn: Setting communication
SDRmn[15:9]: Setting 0000000B
SOm, SOEm: Setting output
Setting transfer rate with the SPSm register

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Renesas RL78/D1A Specifications

General IconGeneral
BrandRenesas
ModelRL78/D1A
CategoryComputer Hardware
LanguageEnglish

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