Renesas RL78/F14 - Page 1203

RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1171
Dec 10, 2015
(7) LIN/UART Baud Rate Prescaler Register (LBRPn)
Address: F06C3H, F06C2H
LBRPn1 LBRPn0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Value after reset: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Function
Setting
Range
R/W
15 to 0 Assuming that the value set in this register is L (0 to 65535), the baud rate prescaler divides the
frequency of the prescaler clock by L + 1.
0000H to
FFFFH
R/W
Set the LBRPn register when the OMM0 bit in the LMSTn register is 0 ( LIN reset mode).
Assuming that the value set in this register is L, the baud rate prescaler divides the frequency of the clock that is selected
by the LPRS bits in the LWBRn register (prescaler clock select bits) by L + 1.
The LBRPn register can be accessed in 8-bit units using the following registers.
 Lower 8 bits: LIN/UART baud rate prescaler 0 register (LBRPn0); address F06C2H
 Upper 8 bits: LIN/UART baud rate prescaler 1 register (LBRPn1); address F06C3H