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Renesas RL78/F14 User Manual

Renesas RL78/F14
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RL78/F13, F14 CHAPTER 14 COMPARATOR (RL78/F14 Only)
R01UH0368EJ0210 Rev.2.10 781
Dec 10, 2015
14.2.3 Comparator I/O Select Register (CMPSEL)
This register is used to select the comparator input, reference voltage, and to enable or disable the VCOUT0 output.
The CMPSEL register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Figure 14-4. Format of Comparator I/O Select Register (CMPSEL)
Address: F0340H After reset: 00H
Symbol 7 <6> 5 4 3 2 1 0
CMPSEL 0
Note 4
CPOE CVRS1 CVRS0 CMPSEL3 CMPSEL2 CMPSEL1 CMPSEL0
CPOE VCOUT0 pin output enable R/W
0 VCOUT0 pin output of the comparator is disabled (the output signal is low level). R/W
1 VCOUT0 pin output of the comparator is enabled.
CVRS1 CVRS0 Reference voltage selection R/W
0 0 No reference voltage R/W
0 1 External reference voltage (IVREF0) selected
1
0
Internal reference voltage (D/A converter output) selected
Note 1
1
1
Setting prohibited
Note 2
CMPSEL3 CMPSEL2 CMPSEL1 CMPSEL0 Comparator input selection R/W
0 0 0 0 No input R/W
0 0 0 1 IVCMP00 selected
0
0 1 0
IVCMP01 selected
0
1 0 0
IVCMP02 selected
1
0 0 0
IVCMP03 selected
Setting the other values is prohibited. For details, see note 3.
Notes 1. When the internal reference voltage is used, set the D/A converter to be used for generating the
internal reference voltage before enabling comparator operation (HCMPON = 1). For details on
setting the internal reference voltage, see CHAPTER 13 D/A CONVERTER (RL78/F14 Only).
2. Modify bits CVRS1 and CVRS0 in the following procedure. Particularly, be sure to set bits CVRS1
and CVRS0 to 00B before changing the set value. Writing a value other than 00B while the value
of these bits is not 00B is invalid and the previous value is retained.
1. Set bit COE in CMPCTL register to 0.
2. Set bits CVRS1 and CVRS0 to 00B.
3. Set a new value to bits CVRS1 and CVRS0 (with 1 set in only one of the bits).
4. Wait for the input switching stabilization wait time (300 ns)
5. Set bit COE in CMPCTL register to 1.
6. Clear flag bit CMPIF0 in the control register.
3. Modify bits CMPSEL3 to CMPSEL0 in the following procedure. Writing a value other than 0000B
while the value of these bits is not 0000B is invalid. Writing 1 to two or more bits is also invalid. In
both cases, the previous value is retained.
1. Set bit COE in CMPCTL register to 0.
2. Set bits CMPSEL3 to CMPSEL0 to 0000B.
3. Set a new value to bits CMPSEL3 to CMPSEL0 (with 1 set in only one of the bits).

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Renesas RL78/F14 Specifications

General IconGeneral
BrandRenesas
ModelRL78/F14
CategoryComputer Hardware
LanguageEnglish

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