Renesas RL78/F14

RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 802
Dec 10, 2015
15.3 Registers Controlling Serial Array Unit
Serial array unit is controlled by the following registers.
• Peripheral enable register 0 (PER0)
• Serial clock select register m (SPSm)
• Serial mode register mn (SMRmn)
• Serial communication operation setting register mn (SCRmn)
• Serial data register mn (SDRmn)
• Serial flag clear trigger register mn (SIRmn)
• Serial status register mn (SSRmn)
• Serial channel start register m (SSm)
• Serial channel stop register m (STm)
• Serial channel enable status register m (SEm)
• Serial output enable register m (SOEm)
• Serial output level register m (SOLm)
• Serial output register m (SOm)
• Serial slave select enable register m (SSEm)
• Input switch control register (ISC)
• Noise filter enable register 0 (NFEN0)
• Port input mode registers 1, 3, 5 to 7, 12 (PIM1, PIM3, PIM5 to PIM7, PIM12)
• Port output mode registers 1, 6, 7, 12 (POM1, POM6, POM7, POM12)
• Port mode registers 1, 3, 5 to 7, 12 (PM1, PM3, PM5 to PM7, PM12)
• Port registers 1, 3, 5 to 7, 12 (P1, P3, P5 to P7, P12)
• Port mode control register 12 (PMC12)
• Port input threshold control registers 1, 3, 5 to 7, and 12 (PITHL1, PITHL3, PITHL5 to PITHL7, PITHL12)
• Port output slew rate select register (PSRSEL)
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1)