Renesas RL78/F14 User Manual

RL78/F13, F14 CHAPTER 8 TIMER RD
R01UH0368EJ0210 Rev.2.10 580
Dec 10, 2015
8.2.10 Timer RD Output Control Register (TRDOCR)
Write to the TRDOCR register when bits TSTART0 and TSTART1 in the TRDSTR register are both 0 (count stops).
Figure 8-11. Format of Timer RD Output Control Register (TRDOCR) [Output Compare Function]
Address: F0269H After Reset: 00H
Note 1
Symbol 7 6 5 4 3 2 1 0
TRDOCR TOD1
TOC1 TOB1 TOA1 TOD0
TOC0 TOB0 TOA0
TOD1
TRDIOD1 initial output level select
Note 2
R/W
0 Low initial output R/W
1 High initial output
TOC1
TRDIOC1 initial output level select
Note 2
R/W
0 Low initial output R/W
1 High initial output
TOB1
TRDIOB1 initial output level select
Note 2
R/W
0 Low initial output R/W
1 High initial output
TOA1 TRDIOA1 initial output level select R/W
0 Low initial output R/W
1 High initial output
TOD0
TRDIOD0 initial output level select
Note 2
R/W
0 Low initial output R/W
1 High initial output
TOC0
TRDIOC0 initial output level select
Note 2
R/W
0 Low initial output R/W
1 High initial output
TOB0
TRDIOB0 initial output level select
Note 2
R/W
0 Low initial output R/W
1 High initial output
TOA0 TRDIOA0 initial output level select R/W
0 Low initial output R/W
1 High initial output
Notes 1. The value after reset is undefined when FRQSEL4 = 1 in the user option byte (000C2H/020C2H) and
TRD0EN = 0 in the PER1 register. If it is necessary to read the initial value, set f
CLK to fIH and TRD0EN
= 1 before reading.
2. If the pin function is set for waveform output, the initial output level is output when the TRDOCR register
is set.

Renesas RL78/F14 Specifications

General

Brand	Renesas
Model	RL78/F14
Category	Computer Hardware
Language	English