Renesas RL78/F14

RL78/F13, F14 CHAPTER 3 CPU ARCHITECTURE
R01UH0368EJ0210 Rev.2.10 179
Dec 10, 2015
Table 3-6. Extended SFR (2nd SFR) List (28/32)
Address Special Function Register (2nd SFR) Name Symbol R/W Manipulable Bit Range After
reset
1-bit 8-bit 16-bit
F061CH CAN0 transmit buffer register 1DL
Note 2
TMDF21L TMDF21 R/W – √ √ 0000H
F061DH TMDF21H – √
F061EH CAN RAM test register 79
Note 1
RPGACC79L RPGACC79 R/W – √ √ 0000H
F061FH RPGACC79H – √
F061EH CAN0 transmit buffer register 1DH
Note 2
TMDF31L TMDF31 R/W – √ √ 0000H
F061FH TMDF31H – √
F0620H CAN RAM test register 80
Note 1
RPGACC80L RPGACC80 R/W – √ √ 0000H
F0621H RPGACC80H – √
F0620H CAN0 transmit buffer register 2AL
Note 2
TMIDL2L TMIDL2 R/W – √ √ 0000H
F0621H TMIDL2H – √
F0622H CAN RAM test register 81
Note 1
RPGACC81L RPGACC81 R/W – √ √ 0000H
F0623H RPGACC81H – √
F0622H CAN0 transmit buffer register 2AH
Note 2
TMIDH2L TMIDH2 R/W – √ √ 0000H
F0623H TMIDH2H – √
F0624H CAN RAM test register 82
Note 1
RPGACC82L RPGACC82 R/W – √ √ 0000H
F0625H RPGACC82H – √
F0626H CAN RAM test register 83
Note 1
RPGACC83L RPGACC83 R/W – √ √ 0000H
F0627H RPGACC83H – √
F0626H CAN0 transmit buffer register 2BH
Note 2
TMPTR2L TMPTR2 R/W – √ √ 0000H
F0627H TMPTR2H – √
F0628H CAN RAM test register 84
Note 1
RPGACC84L RPGACC84 R/W – √ √ 0000H
F0629H RPGACC84H – √
F0628H CAN0 transmit buffer register 2CL
Note 2
TMDF02L TMDF02 R/W – √ √ 0000H
F0629H TMDF02H – √
F062AH CAN RAM test register 85
Note 1
RPGACC85L RPGACC85 R/W – √ √ 0000H
F062BH RPGACC85H – √
F062AH CAN0 transmit buffer register 2CH
Note 2
TMDF12L TMDF12 R/W – √ √ 0000H
F062BH TMDF12H – √
F062CH CAN RAM test register 86
Note 1
RPGACC86L RPGACC86 R/W – √ √ 0000H
F062DH RPGACC86H – √
F062CH CAN0 transmit buffer register 2DL
Note 2
TMDF22L TMDF22 R/W – √ √ 0000H
F062DH TMDF22H – √
F062EH CAN RAM test register 87
Note 1
RPGACC87L RPGACC87 R/W – √ √ 0000H
F062FH RPGACC87H – √
F062EH CAN0 transmit buffer register 2DH
Note 2
TMDF32L TMDF32 R/W – √ √ 0000H
F062FH TMDF32H – √
F0630H CAN RAM test register 88
Note 1
RPGACC88L RPGACC88 R/W – √ √ 0000H
F0631H RPGACC88H – √
F0630H CAN0 transmit buffer register 3AL
Note 2
TMIDL3L TMIDL3 R/W – √ √ 0000H
F0631H TMIDL3H – √
F0632H CAN RAM test register 89
Note 1
RPGACC89L RPGACC89 R/W – √ √ 0000H
F0633H RPGACC89H – √
Notes 1. These registers are allocated to the RAM window 0 for the CAN module (receive rule and CAN RAM test register).
When setting these registers, set the RPAGE bit in the GRWCR register to 0.
2. These registers are allocated to the RAM window 1 for the CAN module (receive buffer, receive FIFO buffer,
transmit/receive FIFO buffer, transmit buffer, and transmit history data). When setting these registers, set the
RPAGE bit in the GRWCR register to 1.