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RL78/F13, F14 CHAPTER 8 TIMER RD

R01UH0368EJ0210 Rev.2.10 577

Dec 10, 2015

CMD1 CMD0

Combination mode select

Notes 3, 4

R/W

 In timer and PWM3 modes, set to 00B (timer mode or PWM3 mode).

 In reset synchronous PWM mode, set to 01B (reset synchronous PWM mode).

 In complementary PWM mode,

CMD1 CMD0

1 0: Complementary PWM mode (transfer from the buffer register to the general register when TRD1

underflows)

1 1: Complementary PWM mode (transfer from the buffer register to the general register at compare

match between registers TRD0

and TRDGRA0)

Other than the above: Do not set.

R/W

Notes 1. The value after reset is undefined when FRQSEL4 = 1 in the user option byte (000C2H/020C2H) and

TRD0EN = 0 in the PER1 register. If it is necessary to read the initial value, set f

CLK to fIH and TRD0EN =

1 before reading.

2. When bits CMD1 and CMD0 are set to 00B (timer mode or PWM3 mode), the setting of the PWM3 bit is

enabled.

3. Set bits CMD0 and CMD1 when both the TSTART0 and TSTART1 bits in the TRDSTR register are set

to 0 (count stops).

4. When bits CMD1 and CMD0 are set to 01B, 10B, or 11B, the MCU enters reset synchronous PWM mode

or complementary PWM mode regardless of the settings of the TRDPMR register.

Renesas RL78/F14 User Manual

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