RL78/F13, F14 CHAPTER 12 A/D CONVERTER
R01UH0368EJ0210 Rev.2.10 724
Dec 10, 2015
Figure 12-11. Format of Analog Input Channel Specification Register (ADS) (2/2)
Address: FFF31H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
ADS ADISS 0 0 ADS4 ADS3 ADS2 ADS1 ADS0
ï‚¡ Scan mode (ADMD = 1)
ADISS ADS4 ADS3 ADS2 ADS1 ADS0 Analog input channel
Scan 0 Scan 1 Scan 2 Scan 3
0 0 0 0 0 0 ANI0 ANI1 ANI2 ANI3
0 0 0 0 0 1 ANI1 ANI2 ANI3 ANI4
0 0 0 0 1 0 ANI2 ANI3 ANI4 ANI5
0 0 0 0 1 1 ANI3 ANI4 ANI5 ANI6
0 0 0 1 0 0 ANI4 ANI5 ANI6 ANI7
0 0 0 1 0 1 ANI5 ANI6 ANI7 ANI8
0 0 0 1 1 0 ANI6 ANI7 ANI8 ANI9
0 0 0 1 1 1 ANI7 ANI8 ANI9 ANI10
0 0 1 0 0 0 ANI8 ANI9 ANI10 ANI11
0 0 1 0 0 1 ANI9 ANI10 ANI11 ANI12
0 0 1 0 1 0 ANI10 ANI11 ANI12 ANI13
0 0 1 0 1 1 ANI11 ANI12 ANI13 ANI14
0 0 1 1 0 0 ANI12 ANI13 ANI14 ANI15
0 1 0 0 0 0 ANI16 ANI17 ANI18 ANI19
0 1 0 0 0 1 ANI17 ANI18 ANI19 ANI20
0 1 0 0 1 0 ANI18 ANI19 ANI20 ANI21
0 1 0 0 1 1 ANI19 ANI20 ANI21 ANI22
0 1 0 1 0 0 ANI20 ANI21 ANI22 ANI23
Other than the above Setting prohibited
Cautions 1. Be sure to clear bits 5 and 6 to 0.
2. Set the port that is set to analog input by the ADPC and PMCxx registers to the input mode
by using port mode registers 3, 7 to 10, or 12 (PM3, PM7 to PM10, PM12).
3. Do not set the pin that is set by the A/D port configuration register (ADPC) as digital I/O by
the ADS register.
4. Do not set the pin that is set by port mode control registers 7, 9, or 12 (PMC7, PMC9, PMC12)
as digital I/O by the ADS register.
5. Only rewrite the value of the ADISS bit while A/D voltage comparator operation is stopped
(which is indicated by the ADCE bit of A/D converter mode register 0 (ADM0) being 0).
6. If using AV
REFP as the + side reference voltage source of the A/D converter, do not select
ANI0 as an A/D conversion channel.
7. If using AV
REFM as the – side reference voltage source of the A/D converter, do not select
ANI1 as an A/D conversion channel.
8. If ADISS is set to 1, the internal reference voltage (1.45 V) cannot be used for the + side
reference voltage source. In addition, the result of the first conversion after ADISS has been
set to 1 is not usable.
9. When entering STOP mode or HALT mode while the CPU is operating on the subsystem/low-
speed on-chip oscillator select clock, do not set ADISS to 1. When ADISS is set to 1, the
current value defined in the supply current characteristics in CHAPTER 34 to CHAPTER 36
ELECTRICAL SPECIFICATIONS must be added.
10. Ignore the conversion result if the corresponding ANI pin does not exist in the product used.
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