Date Code 20010731 Close Logic 4-7
SEL-352-1, -2 Instruction Manual
CCT
MCT
CCTD
MCTD
(CYCLES)
(CYCLES)
RCLS
PCNA
PCPA
ZCNA
MCLOSE
CLOSE
0
CLSdo
0
2
XNTA
YNTA
XPTA
YPTA
X59L3
Y59L3
To Phase-B, C Logic
To Phase-B, C Logic
TRIPA
TRIPB
TRIPC
MDWG3520011
Figure 4.8: Point-On-Wave Controlled Close Logic, A-Phase
Controlled Close Output Timers
These timers are initiated by the zero-crossing and point-on-wave controlled close logic.
You cannot modify the output timer logic shown in Figure 4.9; however, you can turn the timers
off. The CLSA, CLSB, and CLSC settings pick which outputs have timer logic associated with
them, defaulting to OUT301, OUT302, and OUT303, respectively. The pickup times of timers
in this figure are accurate to ±200 microseconds. Each phase has independent timer settings to
enable the user to stagger the closing time of each phase.
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