Long
Record Option
Display System
Acquisition
System
3-42
Changes
in
the display system are limited to the area of the 22V10 U1925
and 16V8 01909. The internal programming of both chips is modified,
and
some outputs of U1925 have pull up resistors.
01925 has been programmed to accept a new readout control word that
could be added to Table
3-2:
Hex value
DO
(page 3-24). When this readout
control word is sent to the display system, combined with waveform data,
this waveform will be accepted at the normal speed (one point per µsec) but
will not be shown on the display. In this way the refresh
of
the pseudo
static
RAM
can be performed at all times.
The functionality of the acquisition system has been changed
in
the follow-
ing area's:
- Acquisition RAM's 01605 and
01606
have been replaced by 128K x 8
types to enable 128K recordlength.
- The address counter (01615, 01616, 01617 and 01640) is made fully
presettable by the local shiftregister 01630, 01631 and 01632 to achieve
programmable pre-triggering.
- The control lines
RLO
-
RL2
connected to the 16V8 P AL's U1640 and
01641 determine the record-length. Table 3-4 indicates the relation
between record- length and the control lines.
Table 3-4
Acquisition
Chain
Record-Length Programming Table
Record
Length
RL2
RL1
RLO
4k
0
0 1
8k
0
1
0
16k
0
1
1
32k
0 0 0
64k
1
0 0
128k 1 1
1
The counting of the pre- and post-trigger period differs from the standard
2212. The post-trigger counter (U1618, U1619, U1620
and
U1641) is always
started at maximum count value. During the pre-trigger period the post-
trigger counter counts at the same rate as the address counter. As soon as
the pre-trigger period has expired (signaled by "PREFUL"), the post-trigger
counter stops. As a result, the post-trigger counter is automatically at
the
post-trigger value. When a trigger occurs, the post-trigger counter will
determine the post-trigger period. Output "TC" and indirectly "EOR"
indicate that the acquisition is completed.
Revised 3/93 Theory
of
Operation
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