Diagnostic LED's
Digital Circuitry
Switching the different timing signals is performed
by
multiplexer U1714.
The
ROLLCLK
signal which is monitored by
the
statemachine, is derived
from SA
VCLK
through the mono stable
multi
vibrator U1701B.
The
acquisition ram is not used
in
roll mode; the data from latches U1603
and
U1604 is transferred directly to the microprocessor through
the
bus
connection U1606
and
U1608 while
the
outputs of
the
acquisition RAM's are
disabled.
Roll Mode Data Transfer to 68070.
The
DMA transfer consists of single word (two bytes) cycle stealing DMA
transfers every 200 microseconds.
The
hardware protocol is basically
the
same as
in
record mode.
Like indicated
in
the timebase table, external clocking of
the
acquisition
speed is also possible. The
EXT
CLK
input
on
J1700 is converted to
the
TTL
level
EXTCLOCK
signal by
the
circuitry around Q1700
and
Q1701
and
U1700. In roll mode
the
maximum frequency is limited to a little over 4 kHz
by
the mono stable multi vibrator U1701A.
The
LED's
DS2100, DS2101 and DS2102 are added for debugging purposes only.
DS2100 should only be illuminated during power up
when
the
RESET_0
line is
active. During normal operation the DS2101
LED
will blink
with
a cycle time of
exactly 1 second, indicating that the operating system software is active. The
DS2102
LED
should blink at a much slower rate (period time 5 to
25
seconds)
indicating that the separate tasks
in
the software are all active.
Parallel Interface
~
The parallel interface is completely software driven through latches which are
~
connected to the processor bus. The interface lines are basically a Centronics
type implementation.
2212 Service Manual
3-
29
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