Vertical System
Delay Line Driver 0
The
delay line driver circuit converts signal currents from the pre-amplifiers
and
position control circuits to voltage levels to drive the delay line
and
the
vertical
output
amplifier.
Vertical Output
Amplifier 0
Vertical Position
Logic (Part
of
0 )
2212 Service Manual
The
emitters of transistors Q202
and
Q203 create the low impedance summing
point of the signal currents from the preamplifier
and
the
position control
circuit. In the collector circuit
of
Q202
and
Q203 a clamp circuit limits the
drive voltages to the output amplifiers.
Op-amp U201A
and
transistor Q210 ensure the average voltage at the output of
the delay line drivers to
be
at zero volts.
Op-amp U201B compensates long term drift of the readout display
in
case the
trace is set to one
of
the extreme positions.
Transistor Q211 , CR204 and CR205 provide vertical beam limit
when
Q211 is
conducting.
The vertical
bandwidth
can be reduced
by
activating Q214 and /or Q215. Diode
bridge CR270 to CR273 will
then
conduct and connect C270 and C271
in
series
across the pre-amplifier output.
The
position control circuit converts vertical positioning currents, vertical
readout
and
vertical storage display information into the appropriate current
levels to the delay line driver.
The
vertical output amplifier consists of
an
input
stage
and
a cascade output
stage.
The
input
stage contains the necessary adjustments to compensate high fre-
quency and delay-line roll off
and
to compensate the low- frequency response.
R340 is adjusted to minimize read
out
jitter. Variable capacitance diodes CR308
and
CR309 minimize high frequency roll off at elevated temperatures.
The
input
voltages for the vertical position logic are generated by the daculator
circuit and based
on
data provided by the front panel processor. Selection of the
positioning voltage is made by the vertical switch logic circuit U810. Possible
selections are:
CH
1,
CH
2,
CH
1 +
CH
2,
CH
1 + Trace Sep,
CH
2 + Trace Sep,
CH
1 +
CH
2 + Trace Sep,
and
Read Out/Storage.
3-11
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