RF Core Data Memory
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25.3.3 RAM-Based Registers
A list of the memory entries of the general radio RAM area used for parameter transfer is shown in
Table 25-5. All these registers are in page 0 of the radio RAM. Each memory entry is considered a
RAM-based register and has a name. Numeric values that are two bytes long are represented in
little-endian format.
The radio RAM registers have no defined reset value and must therefore be initialized by the MCU.
The registers SEMAPHORE0 and SEMAPHORE1 can be used to verify data integrity. These registers are
changed to 0 when they are read. If a semaphore register is read and the value was 1, the semaphore
has been successfully taken, and subsequent reads of the register return 0 until the semaphore is
released. If a semaphore register is read as 0, the semaphore was not free. A semaphore can be released
by writing 1 to the semaphore register; this should only be done if the semaphore has previously been
taken by the MCU. The LLE takes SEMAPHORE0 when a task starts and SEMAPHORE1 when the radio has
been set up. Both semaphores are released by the LLE at the end of the task. SEMAPHORE2 is not used
by the LLE. If the LLE is not granted the semaphore, it generates an error. If SEMAPHORE0 and
SEMAPHORE1 are taken by the MCU before registers protected by these semaphores are modified by the
MCU, data integrity is ensured, and an error occurs if the LLE is accidentally started while such an access
is going on.
Where bit numbering is used, bit 0 is the LSB and bit 7 is the MSB. Multi-byte fields are little-endian.
The detailed breakdown of the address entries ADDR_ENTRY0–ADDR_ENTRY7 is shown in Table 25-4 or
Table 25-6, depending on the operational mode.
The Prot columns of Table 25-4, Table 25-5, and Table 25-6 list the type of protection for each entry:
Sem0: Entries protected by SEMAPHORE0. Should only be written by the MCU while the LLE does not
have SEMAPHORE0. Is not modified by the LLE.
Sem1: Entries protected by SEMAPHORE1. Should only be written by the MCU while the LLE does not
have SEMAPHORE1. Is not modified by the LLE.
Sem1/R: Entries containing state variables and accumulative counters that are updated by the LLE. They
may be read by the MCU after a receive or transmit interrupt to see how many packets have been
received or transmitted. The MCU must take into account that at the time these values are read, some of
them may have been updated for the next interrupt and some not. When the LLE does not have
SEMAPHORE1, the MCU may write to them to initialize. The counters are not initialized by the LLE.
None: No semaphore protection; special rules apply for access.
Table 25-4. RAM-Based Registers
Name Addr Prot Description
Bits 0–6: FREQ
Frequency to use.
0: 2379 MHz
... 1 MHz steps
116: 2495 MHz
117–126: Reserved
0x6000 Sem0
127: The LLE does not program frequency; it is to
PRF_CHAN
be set up by the MCU through the FREQCTRL
and MDMTEST1 registers.
Bit 7: SYNTH_ON
0: Turn off synthesizer when task is done.
1: Leave synthesizer running after task is done.
298
CC2541 Proprietary Mode Radio SWRU191C–April 2009–Revised January 2012
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