EasyManua.ls Logo

ABB ACS880 N5700 Series - Page 497

ABB ACS880 N5700 Series
662 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Def / Type
FbEq 16b / 32b
DescriptionName / Range /
Selection
No.
4 ms / real32(Visible when 92.1 Encoder 1 type = TTL+)
Determines a pulse waiting time used in speed
calculation for the encoder interface. If no pulse edges
are detected within this time, the measured speed is
zeroed by the interface.
Increasing the setting can improve measuring
performance especially at low, near zero speeds.
Note: The parameter is only supported by FEN-xx
modules with FPGA version VIEx 2000 or later. On older
modules, the pulse waiting time is fixed to 4 ms.
Note: The parameter only affects speed measurement.
Position is updated whenever a new pulse edge is
detected. When the measured speed from the interface
is zero, the drive updates its speed data based on
position changes.
Maximum pulse
waiting time
92.23
1 = 1 ms / 1 = 1 msMaximum pulse waiting time.1...200 ms
4 ms / real32(Visible when 92.1 Encoder 1 type = HTL 1)
Determines a pulse waiting time used in speed
calculation for the encoder interface. If no pulse edges
are detected within this time, the measured speed is
zeroed by the interface.
Increasing the setting can improve measuring
performance especially at low, near zero speeds.
Note: The parameter is only supported by FEN-xx
modules with FPGA version VIEx 2000 or later. On older
modules, the pulse waiting time is fixed to 4 ms.
Note: The parameter only affects speed measurement.
Position is updated whenever a new pulse edge is
detected. When the measured speed from the interface
is zero, the drive updates its speed data based on
position changes.
Maximum pulse
waiting time
92.23
1 = 1 ms / 1 = 1 msMaximum pulse waiting time.1...200 ms
No filtering / uint16(Visible when 92.1 Encoder 1 type = HTL)
Enables pulse edge filtering. Pulse edge filtering can
improve the reliability of measurements especially from
encoders with a single-ended connection.
Note: Pulse edge filtering is only supported by FEN-31
modules with FPGA version VIE3 2200 or later.
Note: Pulse edge filtering decreases the maximum
pulse frequency. With 2 µs filtering time, the maximum
pulse frequency is 200 kHz.
Pulse edge filtering92.24
0Filtering disabled.No filtering
1Filtering time: 1 microsecond.1 µs
2Filtering time: 2 microseconds.2 µs
Parameters 497

Table of Contents

Related product manuals