ABB ACSM1 - Sr-D

Standard function blocks
343
SR-D
(10039)
Illustration
Execution time 1.04 µs
Operation When clock input (C) is set to 1, the data input (D) value is stored to the output (O).
When reset input (R) is set to 1, the output is set to 0.
If only set (S) and reset (R) inputs are used, SR-D block acts as an SR block:
The output is 1 if the set input (S) is 1. The output will retain the previous output state if
the set input (S) and reset input (R) are 0. The output is 0 if the set input is 0 and the
reset input is 1.
Truth table:
Inputs Set input (S): Boolean
Data input (D): Boolean
Clock input (C): Boolean
Reset input (R): Boolean
Outputs Output (O): Boolean
SR-D
69
TLA1 1 msec (1)
S
D
>C
R
O
O(69)
SRDCO
previous
O
00000 0 (= Previous output value)
0 0 0 0 -> 1 0 0 (= Data input value)
00100 0 (= Previous output value)
0 0 1 0 -> 1 0 1 (= Data input value)
01001 0 (Reset)
0 1 0 0 -> 1 0 0 (Reset)
01100 0 (Reset)
0 1 1 0 -> 1 0 0 (Reset)
10000 1 (= Set value)
1 0 0 0 -> 1 1 0 (= Data input value) for
one execution cycle, then
changes to 1 according to
the set input (S = 1).
10101 1 (= Set value)
1 0 1 0 -> 1 1 1 (= Data input value)
11001 0 (Reset)
1 1 0 0 -> 1 0 0 (Reset)
11100 0 (Reset)
1 1 1 0 -> 1 0 0 (Reset)
O
previous
is the previous cycle output value.