ABB ACSM1 - Edge & Bistable; Ftrig

Standard function blocks
368
Edge & bistable
FTRIG
(10030)
Illustration
Execution time 0.38 µs
Operation The output (Q) is set to 1 when the clock input (CLK) changes from 1 to 0. The output is
set back to 0 with the next execution of the block. Otherwise the output is 0.
Inputs Clock input (CLK): Boolean
Outputs Output (Q): Boolean
RS
(10032)
Illustration
Execution time 0.38 µs
FTRIG
99
TLA1 1 msec (1)
>CLK
Q
Q(99)
CLK
previous
CLK Q
000
010
1 0 1 (for one execution cycle time, returns to 0 at the
next execution)
110
CLK
previous
is the previous cycle output value.
RS
46
TLA1 1 msec (1)
S
R1
Q1
Q1(46)